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The Circuits and Systems Group

Hardware/Software Codesign and System Level Design

^Qubo Hu

Position:          Ph.D. candidate Office:            B422 Phone:            +47 7359 2916 Fax:                +47 7359 1441  Mobile:           +47 9366 9809 E-mail:            Qubo.Hu.at.iet.ntnu.no Work address NTNU, Department of Electronics and Telecommunications  O.S. Bragstads Plass 2A N-7491 TRONDHEIM NORWAY Private address Jonsvansveien 105C NO-7050 TRONDHEIM  NORWAY Education M.Sc. in System-on-Chip (SoC) Design, Kungl Tekniska Hogskolan (KTH), Sweden, 2002. Master Thesis: Power Efficient ASIC Design of WCDMA Multipath Searcher. B.Sc of Computer Science from China, 1999. Personal interests Hiking, Skiing, Badminton, Reading, Swimming, Music Research My main research interests are in the aspects of VLSI design, embedded system design especially System Level Design and Hardware/Software Codesign. Per Gunnar Kjeldsberg is my advisor. My current work is to develop a method and algorithms for low power memory hierarchy exploration and estimation with loop transformations of data dominated applications. This work is cooperated with IMEC in Leuven, Belgium and Prof. Francky Catthoor is my co-supervisor.

Publications Hu, Q., Catthoor, F., Kjeldsberg, P.G., Vandecappelle, A., and Palkovic, M., “Fast Memory Footprint Estimation based on Dependency Distance Vector Calculation”, accepted at DATE’07, Nice, France, April 16-20, 2007. Thörnberg, B. , Palkovic, M., Hu, Q., Olsson, L., Kjeldsberg, P.G., O’Nils, M, and Catthoor, F., "Bit-Width Constrained Memory Hierarchy Optimization for Real-Time Video Systems", accepted for publication in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Hu, Q., Vandecappelle, A., Palkovic, M., Kjeldsberg, P.G., Brockmeyer, E., and Catthoor, F.,  “Hierarchical Memory Size Estimation for Loop Fusion and Loop Shifting of Data Dominated Applications”, accepted at 11^th Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, Jan. 24-27, 2006, pp. 606 - 611. Thörnberg, B., Hu, Q., Palkovic, M., O'Nils, M, and Kjeldsberg, P.G., "Polyhedral space generation and memory estimation from interface and memory models of real-time video systems", accepted for publication in Elsevier Journal of Systems and Software. Hu, Q., Palkovic, M., Kjeldsberg, P.G., and Catthoor, F., “Scratch-Pad Memory Hierarchy Estimation for Loop Transformations”, in Proceedings of the 5^th ACES Symposium, Edegem, Belgium, Sep. 26-27, 2005. Hu, Q., Palkovic, M., Brockmeyer, E., Kjeldsberg, P.G., and Catthoor, F., “Memory Hierarchy Usage Estimation for Loop Transformations”, DATE’05 Ph.D Forum, Munich, Germany, Mar. 2005. Hu, Q., Brockmeyer, E., Palkovic, M., Kjeldsberg, P.G., and Catthoor, F., “Memory Hierarchy Usage Estimation for Global Loop Transformations”, in Proceedings of 22^nd IEEE Norchip Conference, Oslo, Norway, Nov. 2004, pp. 301-304 Hu, Q., Palkovic, M., Kjeldsberg, P.G., "Memory Requirement Optimization with Loop Fusion and Loop Shifting", in Proceedings of Euromicro Symposium on Digital System Design (DSD), Rennes, France, Sep. 2004, pp. 272-278

Editor in charge: Chairman of the Department, Webmaster: Qubo.Hu.at.iet.ntnu.no, Updated: Nov. 12nd, 2006