Bakgrunn og aktiviteter
Mine interesser er minnesystemer for flerkjerneprosessorer, heterogene systemer, simulering av datamaskinarkitekturer, energieffektivitet og kompilatorteknikk.
Gå til den engelske siden for mer informasjon om min forsknings- og undervisningsaktivitet.
Vitenskapelig, faglig og kunstnerisk arbeid
Et utvalg av nyere tidsskriftspublikasjoner, kunstneriske produksjoner, bok, inklusiv bokdeler og rapport-del. Se alle publikasjoner i databasen
Tidsskriftspublikasjoner
- (2015) Perfect Reconstructability of Control Flow from Demand Dependence Graphs. ACM Transactions on Architecture and Code Optimization (TACO). vol. 11 (4).
- (2015) ParVec: vectorizing the PARSEC benchmark suite. Computing.
- (2013) Challenges of Reducing Cycle-Accurate Simulation Time for TBP Applications. Procedia Computer Science. vol. 18.
- (2011) Exploring the Prefetcher/Memory Controller Design Space: An Opportunistic Prefetch Scheduling Strategy. Lecture Notes in Computer Science. vol. 6566.
- (2011) Storage Efficient Hardware Prefetching using Delta-Correlating Prediction Tables. Journal of Instruction-Level Parallelism. vol. 13.
- (2011) Computational computer architecture. META.
- (2010) Multi-level Hardware Prefetching Using Low Complexity Delta Correlating Prediction Tables with Partial Matching. Lecture Notes in Computer Science. vol. 5 (1).
- (2010) DIEF: An Accurate Interference Feedback Mechanism for Chip Multiprocessor Memory Systems. Lecture Notes in Computer Science.
- (2009) A High Performance Adaptive Miss Handling Architecture for Chip Multiprocessors. Lecture Notes in Computer Science.
- (2009) Experimental Validation of the Learning Effect for a Pedagogical Game on Computer Fundamentals. IEEE Transactions on Education. vol. 52 (1).
Del av bok/rapport
- (2015) A Vector Caching Scheme for Streaming FPGA SpMV Accelerators. Applied Reconfigurable Computing.
- (2014) Optimized Hardware for Suboptimal Software: The Case for SIMD-aware Benchmarks. IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE.
- (2014) Victim Selection Policies for Intel TBB: Overheads and Energy Footprint. Architecture of Computing Systems – ARCS 2014.
- (2014) Graph-based Performance Accounting for Chip Multiprocessor Memory Systems. Proceedings of the 23rd International Conference on Parallel Architectures and Compilation Techniques (PACT).
- (2014) Patterned Heterogeneous CMPs: The Case for Regularity-Driven System-Level Synthesis. 2014 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'14).
- (2014) A Study of Energy and Locality Effects using Space-filling Curves. Proceedings of the 28th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2014) and IPDPS 2014 Workshops (IPDPSW 2014).
- (2014) An Energy Efficient Column-Major Backend for FPGA SpMV Accelerators. 2014 32nd IEEE International Conference on Computer Design (ICCD).
- (2014) Memory-Centric Design for FPGA SpMV Accelerators. ACACES 2014: poster abstracts.
- (2013) On the Energy Footprint of Task Based Parallel Applications. Proceedings of the 2013 International Conference on High Performance Computing & Simulation (HPCS 2013).
- (2013) Energy Efficient Memory Systems. Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems.