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| DOCTORAL DISSERTATIONS
FROM NTNU |
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Author: |
Olavsbråten, Morten
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Title: |
Practical Thermal and Electrical Parameter Extraction Methods
for Modelling HBT´s and their Applications in Power Amplifiers
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Degree: |
Dr. Ing.
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Defence: |
03.04.2003
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Faculty: |
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Year: |
2003
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Press
release
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Fulltext: PDF (10521kB). Requires
Acrobat Reader
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List of papers: |
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1. M. Olavsbråten, ”A Simple Practical
Technique for Estimating the Junction Temperature and the Thermal Resistance
of a GaAs HBT”, 2002 IEEE MTT-S International Microwave Symposium Digest,
vol. 2, pp. 1005-1008, Seattle 2002
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2. M. Olavsbråten, “ A Practical Method
of Parameter Extraction for the VBIC Model used on a GaAs HBT”, GAAS 2000
Conference Proceedings, pp. 56-59, Paris 2000 |
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3. M. Olavsbråten, “Parameter Extraction
and Evaluation of the Bias Dependence of Tf, for the VBIC Model used on a
GaAs HBT”, GAAS 2001 Conference Proceedings, pp. 315-318, London 2001
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4. M. Olavsbråten, L. Indresæter,
“A Low Cost Temperature-Controlled Chuck for a Cascade Probestation”, Proposed
for the 2003 IEEE MTT-S International
Microwave Symposium
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Abstract:
In Chapter 3, a new practical technique for estimating the junction temperature
and
the thermal resistance of an HBT was developed. This technique has been
published
by the author in 2002 [5], and can be found in Appendix A.1. The new technique
estimates an interval for the junction temperature. The main assumption
in the new
technique is that the junction temperature can be calculated from three
separate
phenomena:
• Thermal conduction of the substrate.
• Thermal conduction of the metal connecting the emitter to the via holes.
• The effects of the via holes on the substrate temperature.
The main features of the new technique are:
• The junction temperature and the thermal resistance are calculated from
a few physical properties and the layout of the transistors.
• The only required software tool is a mathematical program like MATLAB.
• The calculation time is very short compared to a full 3D thermal simulation.
• The technique is easy to use for the circuit designer.
• The technique has good accuracy.
The new technique shows good accuracy, when applied to several InGaP/GaAs
HBT’s from Caswell Technology, and compared to the results from other methods
in
[3, 4]. All the results presented in [3, 4] fall well within the estimated
junction
temperature intervals from the new technique, except for the 4x40C transistor
evaluated at 85 °C, where the result is just outside the estimated interval.
As an example of results from the new technique, the estimated junction temperature
increase - relative to the ambient temperature - for the P4x40C is calculated
to be Tj
= [62.9, 81.3] °C. In [3, 4] the junction temperature increase is found
using two
different techniques which give Tj = 71.8 °C and Tj = 80.3 °C. These
results are all
found for a dissipated power of 0.4 W at an ambient temperature of 25 °C.
A simple method for estimating the thermal capacitance was also developed.
This
method was applied to the 1x40C transistor giving an CTH = 1.4⋅10-9
J/K. Using the
thermal resistance RTH = 380 K/W from Table 3.6, the thermal
time constant
becomes τTH = 0.53 µs. Caswell Technology reports the thermal
time constant to be
somewhat smaller than 1 µs. From this the method can be assumed to
have good
accuracy.
In Chapter 4, an overview of the modelling concepts is given. Based on several
requirements the VBIC model was chosen for all the practical modelling.
An
overview of all the parameters associated with VBIC model is given together
with an
explanation on how to find values for these parameters. From this, a practical
parameter extraction method for the VBIC model was developed. This method
is the
first published practical parameter extraction technique for the VBIC model
used on
an InGaP/GaAs HBT, as far as the author knows. The method was published
by the
author in 2000 [6], and can be found in Appendix A.2.
The main features of the extraction method are:
• Only a few common measurements are needed (forward
Gummel, reverse Gummel,
IV, cold capacitor s-parameter, active s-parameter measurements).
• Easy and practical to use for the circuit designer.
• Good accuracy with only a few iterations.
• No expensive and specialized parameter extraction software is required.
The
only software needed is a circuit simulator (and MATLAB to get a good set
of
start values).
The method includes the extraction of the bias dependent forward transit
time. The
parameter extraction and an evaluation of the transit time implementation
in the
VBIC model were published by the author in 2001 [7], and can be found in
Appendix A.3.
The extraction method was evaluated on a single finger, 1x40, InGaP/GaAs
HBT
from Caswell Technology. Only four iterations were required to fit the measurements
very well. There is less than 1 % error in both the IC-VCE
and VBE-VCE plots in
Figure 4.12 and 4.13. At Ic = 20 mA and Vce = [2, 3, 5] V, S21 and S12 have
the largest
error. The maximum magnitude and phase error in the whole frequency range
up to
40 GHz are less than 1.5 dB and 15 degrees.
This chapter also includes measurements and modelling of SiGe HBT’s. Models
for a single finger and a 8-finger transistor were extracted. All the dc
characteristics
of the modelled transistors have less than 3.5 % error. Some amplitude and
phase
errors are observed in the s-parameters, especially for the single finger.
The errors are
caused by uncertainties in the calibration due to a worn calibration substrate,
high
temperature drift during the measurements, and uncertainties in the physical
dimensions/properties caused by lack of information from the foundry. Overall,
the
extracted models fit the measurements quite well.
In Chapter 5 a very linear class A power amplifier has been designed using
the
InGaP/GaAs HBT’s from Caswell technology. The thermal junction estimation
technique developed in Chapter 3 has been used to make a very good thermal
layout
of the power amplifier. The estimated average junction temperature is 98.6
°C above
the ambient temperature, calculated with a total dissipated power of 6.4
W at an
ambient temperature of 45 °C. The maximum junction temperature difference
between the transistor fingers is less than 11 °C.
The estimated thermal resistance of each finger was used in the VBIC model
extracted in Chapter 4.
The PA was constructed with a ‘bus bar’ power combinder at both input and
output,
and optimized for maximum gain with a 10 % bandwidth. The PA had a small
signal
transducer power gain of 15.3 dB and a maximum output power of 34.8 dBm.
The 1
dB compression point was simulated to be 34.5 dBm, and the third order intercept
point was 49.9 dBm. At 33 dBm output power the PAE was 27.2 %, the gain
compression was 0.285 dB and the phase error -0.728 degrees. The PA was
unconditionally stable for all frequencies above 100 MHz.
The bias circuits must be included for a complete stability analysis at
low
frequencies. In a complete stability analysis of a PA, the ‘bus bar’ should
be analysed
in a 2.5D simulator. This has not been performed here.
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